Incremental-in-time Algorithm for Digital Simulation

Recently, an incremental algorithm (incremental-in-space algorithm) for digital simulation has been studied with good results in speeding up simulation. In this paper we present another algorithm (incremental-in-time algorithm) for incremental simulation of digital circuits. The incremental-inspace algorithm pessimistically resimulates the circuit components that could be affected by design changes throughout the simulation time frames. On the other hand, the incremental-in-time algorithm resimulates a circuit component only for the simulation time frames when its inputs or internal state variables make different state transitions from the previous simulation run. It maximally utilizes the past history thereby reducing the number of component evaluations to a minimum. Experimental results obtained for several practical circuits show speedups up to 30 times faster than conventional event-driven simulation.